chip at

英 [tʃɪp æt]

美 [tʃɪp æt]

<口>拿…取笑，挑…的毛病

英英释义

verb

• engrave or cut by chipping away at a surface
  1. carve one's name into the bark
  Synonym:carve

双语例句

• BiCMOS ( Bipolar CMOS) is the technology that CMOS transistors and bipolar transistors are integrated on the same chip at the same time.
  BiCMOS（BipolarCMOS）是CMOS和双极器件同时集成在同一块芯片上的技术，其基本思想是以CMOS器件为主要单元电路，而在要求驱动大电容负载之处加入双极器件或电路。
• IBM, collaborating with Germany's Infineon Technologies, has developed a one megabit ( million bit) MRAM chip at its laboratories in East Fishkill, New York.
  IBM与德国英飞凌技术公司合作，在其位于纽约东费什基尔的实验室开发出一块1兆（百万位）MRAM芯片。
• At present, many chip manufacturers at home and abroad are committed to the development of multi-core technology. Multi-core chips can increase the frequency of this system and reduce the power consumption at the same time, increase the speed of computing.
  目前，国内外很多芯片生产厂家正在致力于多核技术的研究和发展，多核技术可以降低芯片的频率，从而在降低了系统功耗的同时，提高芯片的运算速度。
• Her comments were beginning to chip away at his self-confidence.
  她的话开始削弱他的自信心。
• The sensor measures the flow velocity by the change of heat power which keep the chip at constant temperature.
  该传感器利用维持芯片温度恒定所需的加热功率的变化作为流速的量度。
• Instead, the closer in quality and price the knockoffs are to the genuine products, the more the counterfeit goods chip away at the company's sales, say analysts.
  分析师们称，仿冒品在质量和价格上越接近正品，品牌商的销售受到的冲击就越大。
• The deal is Microsoft's latest attempt to chip away at the dominance of the search leader, Google.
  这项协议是微软公司的最新努力，意在削弱互联网搜索业领头羊谷歌的垄断地位。
• Motorola is developing a digital tablet device that will allow users to watch television on it as it joins other tech companies aiming to chip away at a market established by Apple's popular iPad.
  摩托罗拉（Motorola）正开发一款数字平板设备，用户将能通过该设备收看电视，该公司由此加入其他科技公司的行列，以求打入由苹果（Apple）广受欢迎的iPad平板电脑开创的市场。
• If done on a large scale, this would chip away at the state banking monopoly.
  如果大批贷款公司变身为银行，将会打破国有银行所处的垄断地位。
• As the interconnect delay is the main effect causing the timing convergence problem, it should be considered as to how the interconnect delay affects the performance of the chip at the early design stage.
  深亚微米工艺下连线时延是引起时序收敛问题的主要原因，在芯片的设计初期就要考虑连线设计对芯片性能的影响。